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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16646T PI74FCT162646T PI74FCT162H646T
Fast CMOS 16-Bit Registered Transceivers
Product Features
Common Features: PI74FCT16646T, PI74FCT162646T, and PI74FCT162H646 are high-speed, low power devices with high current drive VCC = 5V 10% Hysteresis on all inputs Packages available: 56-pin 240 mil wide plastic TSSOP (A) 56-pin 173 mil wide plastic TVSOP (JEDEC TSSOP K) 56-pin 300 mil wide plastic SSOP (V) PI74FCT16646T Features: High output drive: IOH = 32mA; IOL = 64mA Power off disable outputs permit live insertion Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25C PI74FCT162646T Features: Balanced output drivers: 24mA Reduced system switching noise Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V, TA = 25C PI74FCT162H646T Features: Bus Hold retains last active bus state during Three-state Eliminates the need for external pull-up resistors
Product Description
Pericom Semiconductors PI74FCT series of logic circuits are pro duced in the Companys advanced 0.6 micron CMOS technology, achieving industry leading speed grades. The PI74FCT16646T, PI74FCT162646T, and PI74FCT162H646 are 16-bit registered transceivers organized as two independent 8-bit bus transceivers designed with 3-state D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Each 8-bit transceiver utilizes the enable control (xOE) and direction pins (xDIR) to control the transceiver functions. The Select (xSAB and xSBA) control pins are used to select either real-time or stored data transfer. The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between real-time and stored data. A low input level selects real-time data and a high selects stored data. The PI74FCT16646T output buffers are designed with a Power-Off disable allowing live insertion of boards when used as backplane drivers. The PI74FCT162646T has 24mA balanced output drivers. It is designed with current limiting resistors at its outputs to control the output edge rate resulting in lower ground bounce and undershoot. This eliminates the need for external terminating resistors for most interface applications. The PI74FCT162H646T has Bus Hold which retains the inputs last state whenever the input goes to high-impedance preventing floating inputs and eliminating the need for pull-up/down resistors.
Logic Block Diagram
1OE 1DIR 1CLKBA 1SBA 1CLKAB 1SAB
2OE 2DIR 2CLKBA 2SBA 2CLKAB 2SAB
B REG D C
1A0
B REG D C
1B0 2A0
A REG D C
A REG D C
2B0
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
1
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Product Pin Configuration
1DIR 1CLKAB 1SAB
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16646T/162646T/162H646T 16-Bit Registered Transceivers
Truth Table
Inputs Function/Operation Isolation Store A and B Data Real Time B Data to A Bus Stored B Data to A Bus Real Time A Data to B Bus Stored A Data to B Bus xOE H H L L L L
XDIR XCLKAB XCLKBA XSAB XSBA
DATA I/O(2)
XAX XBX
X X L L H H
H or L X X X H or L
H or L X H or L X X
X X X X L H
X X L H X X
Input Output Input
Input Input Output
Notes: 1.The data output functions may be enabled or disabled by various signals at the xOE or xDIR inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every low-to-high transition on the clock inputs. 2. Select control = L: clocks can occur simultaneously. Select control = H: clocks must be staggered to load both registers. H = High Voltage Level; L = Low Voltage Level; X = Don't Care; = LOW-to-HIGH transition
Product Pin Description
1OE 1CLKBA 1SBA
GND
1A0 1A1
VCC
1A2 1A3 1A4
GND
1A5 1A6 1A7 2A0 2A1 2A2
GND
2A3 2A4 2A5
VCC
2A6 2A7
1 56 2 55 3 54 4 53 5 52 6 51 7 50 8 49 9 48 10 56-PIN 47 V56 11 46 A56 12 45 K56 13 44 14 43 15 42 16 41 17 40 18 39 19 38 20 37 21 36 22 35 23 34 24 33 25 26 27 28 32 31 30 29
Pin Name xAx(1) xBx(1) xCLKAB, xCLKBA SAB, SBA xDIR, xOE GND VCC
GND
1B0 1B1
VCC
1B2 1B3 1B4
Description Data Register A Inputs Data Register B Outputs Data Register B Inputs Data Register A Outputs Clock Pulse Inputs Output Data Source Select Inputs Output Enable Inputs Ground Power
GND
1B5 1B6 1B7 2B0 2B1 2B2
Note: 1.For the PI74FCT162H646T, these pins have "Bus Hold." All other pins are standard, outputs, or I/Os.
GND
2B3 2B4 2B5
VCC
2B6 2B7
GND
2SAB 2CLKAB 2DIR
GND
2SBA 2CLKBA 2OE
2
PS2039B
02/24/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16646T/162646T/162H646T 16-Bit Registered Transceivers
REAL-TIME TRANSFER BUS B TO A
REAL-TIME TRANSFER BUS A TO B
BUS A
BUS B
BUS A
BUS B
xDIR xOE L L
xCLKAB X
xCLKBA X
xSAB X
xSBA L
xDIR xOE H L
xCLKAB X
xCLKBA X
xSAB L
xSBA X
STORAGE FROM A AND/OR B
TRANSFER STORES DATA TO A AND/OR B
BUS A
BUS B
BUS A
BUS B
xDIR xOE H L L L X H
xCLKAB X
xCLKBA X
xSAB X X X
xSBA X X X
xDIR xOE L L H L
xCLKAB X H or L
xCLKBA H or L X
xSAB X H
xSBA H X
3
PS2039B
02/24/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16646T/162646T/162H646T 16-Bit Registered Transceivers
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................................................. -65C to +150C Ambient Temperature with Power Applied ................................ -40C to +85C Supply Voltage to Ground Potential (Inputs & Vcc Only) .......... -0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) ....... -0.5V to +7.0V DC Input Voltage ......................................................................... -0.5V to +7.0V DC Output Current .................................................................................... 120mA Power Dissipation ......................................................................................... 1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = 40C to +85C, VCC = 5.0V 10%)
Parameters Description VIH VIL IIH IIH IIH IIH IIL IIL IIL IIL IBHH IBHL IOZH(5) IOZL(5) VIK IOS IO VH Input HIGH Voltage Input LOW Voltage Input HIGH Current Input HIGH Current Input HIGH Current Input HIGH Current Input LOW Current Input LOW Current Input LOW Current Input LOW Current Bus Hold Sustain Current High-Impedance Output Current (3-STATE OUTPUTS) Clamp Diode Voltage Short Circuit Current Output Drive Current Input Hysteresis Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level Standard Input, VCC = Max. Standard I/O, VCC = Max. Bus Hold Input(4), VCC = Max. Bus Hold I/O(4), VCC = Max. Standard Input, VCC = Min. Standard I/O, VCC = Min. Bus Hold Input(4), VCC = Min. Bus Hold I/O(4), VCC = Min. Bus Hold Input(4), VCC = Min. VCC = Max. VCC = Max. VCC = Min., IIN = 18mA VCC = Max.(3), VOUT = GND VCC = Max.(3), VOUT = 2.5V Min. 2.0 VIN = VCC VIN = VCC VIN = VCC VIN = VCC VIN = GND VIN = GND VIN = GND VIN = GND VIN = 2.0V VIN = 0.8V VOUT = 2.7V VOUT = 0.5V 0.8 1 1 100 100 1 1 100 100 50 +50 Typ.(2) Max. Units V V A A A A A A A A A A A V mA mA m V
1 1 0.7 140 100 1.2 200 180
80 50
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Pins with Bus Hold are identified in the pin description. 5. This specification does not apply to bi-directional functionalities with Bus Hold.
4
PS2039B
02/24/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16646T/162646T/162H646T 16-Bit Registered Transceivers
PI74FCT16646T Output Drive Characteristics (Over the Operating Range)
Parameters Description VOH Output HIGH Voltage Test Conditions(1) VCC = Min., VIN = VIH or VIL IOH = -3.0mA IOH = -15.0mA IOH = -32.0mA IOL = 64mA Min. 2.5 2.4 2.0 -- Typ.(2) 3.5 3.5 3.0 0.2 -- Max. Units V
VOL IOFF
Output LOW Voltage Power Down Disable
VCC = Min., VIN = VIH or VIL VCC = 0V, VIN or VOUT 4.5V
0.55 100
V A
PI74FCT162646T/162H646T Output Drive Characteristics (Over the Operating Range)
Parameters Description VOH VOL IODL IODH Output HIGH Voltage Output LOW Voltage Output LOW Current Output HIGH Current Test Conditions(1) VCC = Min., VIN = VIH or VIL IOH = 24.0mA VCC = Min., VIN = VIH or VIL IOL = 24mA VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) Min. 2.4 60 60 Typ.(2) 3.3 0.3 115 115 Max. 0.55 150 150 Units V V mA mA
Capacitance (TA = 25C, f = 1 MHz)
Parameters(4) CIN COUT Description Input Capacitance Output Capacitance Test Conditions VIN = 0V VOUT = 0V Typ. 4.5 5.5 Max. 6 8 Units pF pF
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is determined by device characterization but is not production tested.
5
PS2039B
02/24/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16646T/162646T/162H646T 16-Bit Registered Transceivers
Power Supply Characteristics
Parameters Description ICC ICC ICCD Quiescent Power Supply Current Supply Current per Input @ TTL HIGH Supply Current per Input per MHz(4) Test Conditions(1) VCC = Max. VCC = Max. VIN = GND or VCC VIN = 3.4V(3) Min. Typ.(2) 0.12 0.5 75 Max. 500 1.5 120 Units A mA A/ MHz
VCC = Max., Outputs Open VIN = VCC xDIR = xOE = GND VIN = GND One Bit Toggling 50% Duty Cycle VCC = Max., Outputs Open fCP = 10 MHZ (XCLKBA) 50% Duty Cycle xDIR = xOE = GND One Bit Toggling fI = 5 MHZ 50% Duty Cycle VCC = Max., Outputs Open fCP = 10 MHZ (XCLKBA) 50% Duty Cycle xDIR = xOE = GND 16 Bits Toggling fI = 2.5 MHZ 50% Duty Cycle VIN = VCC VIN = GND
IC
Total Power Supply Current(6)
0.8
1.7(5)
mA
VIN = 3.4V VIN = GND VIN = VCC VIN = GND
1.3
3.2(5)
3.8
6.5(5)
VIN = 3.4 VIN = GND
8.3
20.0(5)
Notes: 1. For Max. or Min. conditions use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz.
6
PS2039B
02/24/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16646T/162646T/162H646T 16-Bit Registered Transceivers
PI74FCT16646T Switching Characteristics over Operating Range
16646T Com.
(1)
16646AT Com. Min. Max.
16646CT Com. Min. Max.
16646DT Com. Min. Max.
16646ET Com. Min. Max. Units
Parameters tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPLH tPHL tSU tH tW tSK(o)
Description Propagation Delay Bus to Bus Output Enable Time xDIR or xOE to Bus Output Disable Time(3) xDIR or xOE to Bus Propagation Delay Clock to Bus Propagation Delay xSBA or xSAB to Bus Setup Time HIGH or LOW, BUS to Clock Hold Time HIGH or LOW, Bus to Clock Clock Pulse Width HIGH or LOW(3) Output Skew(4)
Conditions CL = 50 pF RL = 500
Min.
Max.
2.0 2.0 2.0 2.0 2.0 4.0 2.0 6.0 --
9.0 14.0 9.0 9.0 11.0 -- -- -- 0.5
2.0 2.0 2.0 2.0 2.0 2.0 1.5 5.0 --
6.3 9.8 6.3 6.3 7.7 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 2.0 1.5 5.0 --
5.4 7.8 6.3 5.7 6.2 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 2.0 1.0 3.0 --
4.4 5.0 4.3 4.4 5.0 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 2.0 0.0 3.0 --
3.8 4.8 4.0 3.8 4.2 -- -- -- 0.5
ns ns ns ns ns ns ns ns ns
PI74FCT162646T Switching Characteristics over Operating Range
162646T Com.
(1)
162646AT Com. Min. Max.
162646CT Com. Min. Max.
162646DT Com. Min. Max.
162646ET Com. Min. Max. Units
Parameters tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPLH tPHL tSU tH tW tSK(o)
Description Propagation Delay Bus to Bus Output Enable Time xDIR or xOE to Bus Output Disable Time(3) xDIR or xOE to Bus Propagation Delay Clock to Bus Propagation Delay xSBA or xSAB to Bus Setup Time HIGH or LOW, BUS to Clock Hold Time HIGH or LOW, Bus to Clock Clock Pulse Width HIGH or LOW(3) Output Skew(4)
Conditions CL = 50 pF RL = 500
Min.
Max.
2.0 2.0 2.0 2.0 2.0 4.0 2.0 6.0 --
9.0 14.0 9.0 9.0 11.0 -- -- -- 0.5
2.0 2.0 2.0 2.0 2.0 2.0 1.5 5.0 --
6.3 9.8 6.3 6.3 7.7 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 2.0 1.5 5.0 --
5.4 7.8 6.3 5.7 6.2 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 2.0 1.0 3.0 --
4.4 5.0 4.3 4.4 5.0 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 2.0 0.0 3.0 --
3.8 4.8 4.0 3.8 4.2 -- -- -- 0.5
ns ns ns ns ns ns ns ns ns
Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested. 4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
7
PS2039B
02/24/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16646T/162646T/162H646T 16-Bit Registered Transceivers
PI74FCT162H646T Switching Characteristics over Operating Range
162H646T Com.
(1)
162H646AT 162H646CT 162H646DT 162H646ET Com. Min. Max. Com. Min. Max. Com. Min. Max. Com. Min. Max. Units
Parameters tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPLH tPHL tSU tH tW tSK(o)
Description Propagation Delay Bus to Bus Output Enable Time xDIR or xOE to Bus Output Disable Time(3) xDIR or xOE to Bus Propagation Delay Clock to Bus Propagation Delay xSBA or xSAB to Bus Setup Time HIGH or LOW, BUS to Clock Hold Time HIGH or LOW, Bus to Clock Clock Pulse Width HIGH or LOW(3) Output Skew(4)
Conditions CL = 50 pF RL = 500
Min.
Max.
2.0 2.0 2.0 2.0 2.0 4.0 2.0 6.0 --
9.0 14.0 9.0 9.0 11.0 -- -- -- 0.5
2.0 2.0 2.0 2.0 2.0 2.0 1.5 5.0 --
6.3 9.8 6.3 6.3 7.7 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 2.0 1.5 5.0 --
5.4 7.8 6.3 5.7 6.2 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 2.0 1.0 3.0 --
4.4 5.0 4.3 4.4 5.0 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 2.0 0.0 3.0 --
3.8 4.8 4.0 3.8 4.2 -- -- -- 0.5
ns ns ns ns ns ns ns ns ns
Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested. 4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
Pericom Semiconductor Corporation 2380 Bering Drive * San Jose, CA 95131 * 1-800-435-2336 * Fax (408) 435-1100 * http://www.pericom.com
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PS2039B 02/24/99

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